5 Small-signal equivalent circuits - amplifiers

Q 5.1

Given is the circuit below. The transistor is biased in “normal mode” (active forward, $V_{\mathit{CE}}>V_{\mathit{CE},\mathit{knee}}$). The behaviour of the transistor is then as a good approximation: $$\begin{array}{rcll}& & i_C=I_{C0}\cdot e^{\frac{q\cdot v_{\mathit{BE}}}{\mathit{KT}}}& \\ & & i_B=\frac{i_C}{\mathit{\alpha fe}}& \end{array}$$

The transistor is biased at an emitter bias current $I_E=1\mathit{mA}$ for $V_{\mathit{BE}}=0.6V$ and has a current gain $\mathit{\alpha fe}=99$. Furthermore, $R_{B2}=220k\mathrm{\Omega }$, $R_E=500\mathrm{\Omega }$ and $V_{\mathit{CC}}=5V$.

(a)

Derive an expression for the value of $R_{B1}$ required to set the specified $I_E$, as a function of the parameters of the other components (wherever applicable) and determine its numerical value.

(b)

Explain the impact of temperature variations on $I_E$ and $I_C$.

(c)

Determine the small signal parameters $g_m$ and $\mathit{\alpha fe}∕g_m$ for the BJT in this circuit in the bias point. Give you answer numerically (pay attention to the dimensions! ) and draw the small-signal equivalent circuit of the transistor. For the temperature of the circuit, $\frac{\mathit{kT}}{q}=25\mathit{mV}$.

(d)

Draw the small-signal equivalent circuit of the circuit in a frequency range where the capacitors $C_{\mathit{in}}$ , $C_1$ and $C_2$ have a negligible impedance.

(e)

Derive an equation for $R_C$, to ensure that the amplitude of $v_{\mathit{OUT}1}$ is equal to that of $v_{\mathit{OUT}2}$.

(f)

Derive the phase relation between $v_{\mathit{out}1}$ and $v_{\mathit{out}2}$.

(g)

Derive an expression for the output resistance of the circuit, as seen on the port where $v_{\mathit{out}2}$ is defined.

(h)

Derive an expression for the input resistance of the circuit

Q 5.2

Given is the circuit schematic below. The transistor in this schematic has current gain $\mathit{\alpha fe}$ and has a finite output resistance; the collector current can be written as:

$$i_C=I_{C0}\left(e^{\frac{q{V}_{\mathit{BE}}}{\mathit{kT}}}-1\right)\left(1+\frac{V_{\mathit{CE}}}{V_A}\right)$$

with $V_A$ the Early Voltage, $k=1.38\cdot 10^{-23}[m^2\cdot \mathit{kg}\cdot s^{-2}\cdot K^{-1}]$ (Boltzmann constant) and $q=1.6\cdot 10^{-19}C$ (elementary charge). Consequently, $\frac{\mathit{kT}}{q}\simeq 25\mathit{mV}$ at room temperature, $T=290K$. You can assume the components $L_1$, $C_E$, and $C_{\mathit{out}}$ to be “large” for the signal frequencies of interest. We will ignore the output impedance of the BJT for all sub questions except for (d).

(a)

Derive an expression for the bias collector current $I_C$ expressed in properties or values of the various components. Do not neglect the base current.

(b)

Find an expression for the bias collector voltage $V_C$.

(c)

What amplifier topology is this (no motivation needed)?

(d)

Explain what you have to assume to be able to neglect the output impedance of the BJT in small signal derivations of e.g. voltage gain and output impedance.

(e)

Draw a small-signal equivalent circuit of this amplifier.

(f)

Calculate the output impedance of this amplifier.

(g)

Calculate the small-signal voltage gain of this amplifier.

Q 5.3

Given is the circuit in the figure below. The element equations of the BJT (for the region of operation assumed in this question) are:

$$i_C=I_{C0}{e}^{\frac{q{v}_{\mathit{BE}}}{\mathit{kT}}}$$

$$i_B=\frac{i_C}{\mathit{\alpha fe}}$$

The transistor is biased at a collector bias current $I_C=10\mathit{mA}$ for which (for this particular transistor) $V_{\mathit{BE}}=0.7V$. The current gain $\mathit{\alpha fe}$ is 49. Furthermore, circuit operates at $300K$, $R_{B1}=15k\mathrm{\Omega }$, $R_{B2}=20k\mathrm{\Omega }$ and $V_{\mathit{CC}}=10V$.

(a)

Derive an expression for $R_E$ and (after that) determine the numerical value of $R_E$.

(b)

Explain briefly when we may use a small-signal approach for a BJT.

(c)

Draw the small-signal equivalent circuit and derive an expression for the small-signal output resistance.

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Q 5.4

Given is the circuit below. In this circuit schematic, the MOS transistor is operated in the square law region where $i_D=\frac{1}{2}K\cdot {(v_{\mathit{GS}}-V_T)}^2$.

(a)

Explain only 1 small-signal parameter is required to describe the behaviour of the MOS transistor for small, low frequency signals. The circuit is used for frequencies where $C_1$ and $C_2$ can be seen as low-ohmic, resulting in a circuit which behaves like a common-gate circuit (CGC).

(b)

Draw the small signal equivalent circuit for the circuit for frequencies where $C1$ and $C2$ are (very) low-ohmic AND explain the term “common-gate” for this circuit.

(c)

Derive an expression for the input resistance of the circuit.

(d)

Derive an expression for the output resistance of the circuit for a frequency where $C_{\mathit{in}}$ and $C_{\mathit{out}}$ have a negligible low impedance.

Q 5.5

The figure below shows the circuit schematic of the input stage of a low-noise dynamic microphone pre-amplifier. The voltage from the microphone is indicated by $V_{\mathit{mic}}$. In this circuit, the supply voltage $V_{\mathit{CC}}=12V$. The transistor has a very large output resistance and $\mathit{\alpha fe}=200$. For the signal frequencies of interest all capacitors may be considered as low-ohmic.

(a)

Derive that the voltage gain $a_v$ of this circuit is ideally given by $a_v=g_m\cdot R_C$ if there is no load connected to the output of the amplifier.

(b)

In reality, the circuit will be loaded by the input impedance of the next (amplifier) stage. Draw the small signal equivalent circuit, including the input resistance $R_{\mathit{in},\mathit{NEXT}}$ of the next amplifier stage

(c)

Derive an expression for the voltage gain $a_v$ of the input stage, loaded by the input resistance $R_{\mathit{IN},\mathit{NEXT}}$ of the next stage.

(d)

Derive an expression for the input resistance of the pre-amplifier input stage.

(e)

Calculate the required bias collector current $I_C$ for an input resistance of $250\mathrm{\Omega }$ (apparently the optimum value for the selected microphone).

(f)

We assume for now that $R_{\mathit{IN},\mathit{NEXT}}$ of the next stage is $40k\mathrm{\Omega }$. Derive an equation for $R_C$ to obtain a voltage gain $a_v=80$ of the input stage.

The following figure shows the schematic of a second amplifier stage that is used to further amplify the voltage from the input stage reported above. To reduce the distortion due to the relatively large signal levels, emitter degeneration is used via resistor $R_{E1}$. Again, $V_{\mathit{CC}}=12V$, $\mathit{\alpha fe}=200$, and for the signal frequencies of interest all capacitors may be considered as low-ohmic.

(g)

Draw the small signal equivalent circuit for this second amplifier stage.

(h)

Derive an expression for the voltage gain of this second amplifier stage.

(i)

Derive an expression for the small-signal input resistance $r_{\mathit{in}}$ of the second amplifier stage.

(j)

The second amplifier stage is dimensioned as follows: $R_C=3k\mathrm{\Omega }$, $R_{E1}=300\mathrm{\Omega }$, $R_{E2}=600\mathrm{\Omega }$, $R_{B1}=400k\mathrm{\Omega }$, $R_{B2}=100k\mathrm{\Omega }$. Calculate the numerical value of the input resistance of the second amplifier stage. Is it smaller or larger than the assumption of $40k\mathrm{\Omega }$? How does this affect the voltage gain of the input stage?

Q 5.6

Below, the circuit schematic of the input stage of a dynamic microphone pre-amplifier is shown. Note that it resembled the amplifier in the previous exercise, but now uses MOS transistors. The microphone voltage is indicated by $V_{\mathit{mic}}$. The power supply voltage $V_{\mathit{DD}}=12V$. The transistor has a threshold voltage $V_T=1V$, and $K=40\frac{\mathit{mA}}{V^2}$. For the signal frequencies of interest all capacitors are low impedant.

(a)

Draw the small signal equivalent circuit of the MOS pre-amplifier input stage, loaded by a next stage that has input resistance $r_{\mathit{in},\mathit{next}}$.

(b)

Derive an expression for the voltage gain $a_v$ of the circuit, including the input resistance $r_{\mathit{in},\mathit{next}}$ of the next stage.

(c)

Derive an expression for the input resistance of the amplifier, as seen by the microphone.

(d)

Calculate the required drain current for an input resistance of $250\mathrm{\Omega }$.

The next figure shows the schematic of the second amplifier stage that is used to further amplify the voltage from the input stage. Again, $V_{\mathit{DD}}=12V$, $V_T=1V$, $K=40\frac{\mathit{mA}}{V^2}$ and for the signal frequencies of interest all capacitors may be considered as low ohmic.

(e)

Draw a small signal equivalent circuit for the second amplifier stage.

(f)

Derive an expression for the voltage gain $a_v$ of the second amplifier stage.

(g)

Derive an equation for $R_{S2}$ to get a specific $I_D$, assuming square law operation and assuming that the other component vales are known.

(h)

The second stage is dimensioned for a drain current of $I_D=5\mathit{mA}$ with $R_D=1.2k\mathrm{\Omega }$, $R_{S1}=250\mathrm{\Omega }$, $R_{G1}=R_{G2}=200k\mathrm{\Omega }$. Calculate (numerically) the required value of $R_{S2}$.

(i)

Calculate the numerical value of the voltage gain of the second amplifier stage.

Q 5.7

Given is the circuit schematic below. For the signal frequencies of interest the capacitors may be considered as low ohmic.

(a)

Derive an expression for the collector current $I_C$ (as a function of $V_{\mathit{CC}}$, $R_B$, $R_C$, $\mathit{\alpha fe}$). You can assume that the base-emitter voltage of the transistor is $0.6V$.

(b)

Draw the small signal equivalent circuit.

(c)

Derive an expression for the voltage gain of the circuit.

(d)

Derive an equation for the required value of $R_B$ for a collector current of $I_C$. After that calculate the value numerically for $I_C=1\mathit{mA}$, $V_{\mathit{CC}}=3V$, $R_C=2k\mathrm{\Omega }$ and $\mathit{\alpha fe}=100$.

(e)

If the transistor is replaced by another one with $\mathit{\alpha fe}=40$ (without adjusting $R_B$ and $R_C$), how does that affect the collector current?

Q 5.8

The next figure shows the circuit schematic of an amplifier consisting of two stages. For the signal frequencies of interest all capacitors may be considered as low ohmic. For both transistors $\mathit{\alpha fe}=120$. You can assume that the base-emitter voltages of the transistors are equal to $0.6V$.

The circuit is dimensioned for operation at a $3V$ power supply ($V_{\mathit{CC}}=3V$). Both transistors are biased at a collector current of $I_{C1}=I_{C2}=0.1\mathit{mA}$.

(a)

As extra information: the bias voltage at the emitter of $Q2$ is chosen to be $0.9V$. Calculate the required values for $R_E$, $R_{C1}$ and $R_B$.

(b)

Draw the small signal equivalent circuit of the $2^{\mathit{nd}}$ amplifier stage, and use it to calculate the input resistance of this stage (seen at the base of $Q2$).

(c)

Derive an expression for the voltage gain of the complete two-stage amplifier, that is from $V_{\mathit{IN}}$ to $V_{\mathit{OUT}}$. Do not yet insert values, that is give your answer as a function of e.g. $g_{m,Q1}$, $g_{m,Q2}$, $\mathit{\alpha fe}$, $R_{C1}$, $R_{C2}$, $R_E$, etc.

(d)

Calculate the value of $R_{C2}$ required for a total voltage gain of $a_v=400$. Assume that all other component values are known.

Q 5.9

Given is the circuit below. For the BJT, operation active forward operation may be assumed where $i_C=I_{C0}\cdot e^{\frac{q\cdot v_{\mathit{BE}}}{\mathit{kT}}}$; $\mathit{\alpha fe}$ is finite and cannot be neglected. At signal frequencies, the capacitors can be assumed to be low-impedant and the inductors can be assumed to be high-impedant.

(a)

derive a proper small signal equivalent for the transistor in the circuit using the specified element equations AND derive (not: only state) the small signal parameters as function of e.g. the bias current of the transistor.

(b)

derive an equation for the required value of resistor $R_1$ to get a collector bias current equal to $I_C$, as a function of all relevant component values/properties.

(c)

derive an expression for the output impedance $z_{\mathit{out}}$.

(d)

derive an expression for the input impedance $z_{\mathit{in}}$ as seen by the signal source.

(e)

derive an expression for the voltage gain $a_v=v_{\mathit{out}}∕v_{\mathit{in}}$.

Q 5.10

Given is the circuit below. For the BJT, operation active forward operation may be assumed where $i_C=I_{C0}\cdot e^{\frac{q\cdot v_{\mathit{BE}}}{\mathit{kT}}}$; the $\mathit{\alpha fe}$ is finite and cannot be neglected. At signal frequencies, the capacitors can be assumed to be low-impedant and the inductors can be assumed to be high-impedant.

Note that the input signal source is a current source (and note it’s direction). For voltage gain derivations this source is allowed to be replaced by a voltage source. For this circuit, the sign of $I_1$ should be included properly (KCL).

(a)

derive a proper small signal equivalent for the transistor in the circuit using the specified element equations AND derive (not: only state) the small signal parameters as function of e.g. the bias current of the transistor.

(b)

derive an expression for the input impedance $z_{\mathit{in}}$ as seen by the signal source.

(c)

derive an equation for the required value of resistor $R_1$ to get a collector bias current equal to $I_C$, as a function of all relevant component values/properties.

(d)

derive an expression for the voltage gain $a_v=v_{\mathit{out}}∕v_{\mathit{in}}$. If in the schematic your circuit is driven by a current source, for this specific question you may replace that one by a signal voltage source between the same nodes in the schematic.

(e)

derive an expression for the output impedance $z_{\mathit{out}}$.

Q 5.11

Given is the circuit below. For the BJT, the active forward region of operation may be assumed. In this region of operation, $i_C=I_{C0}\cdot e^{\frac{q\cdot v_{\mathit{BE}}}{\mathit{kT}}}$; the $\mathit{\alpha fe}$ is finite and cannot be neglected. At signal frequencies, the capacitors can be assumed to be low-impedant and the inductors can be assumed to be high-impedant.

(a)

derive a small signal equivalent circuit.

(b)

derive an expression for the output impedance $z_{\mathit{out}}$.

(c)

derive an equation for the required value of resistor $R_1$ to get a collector bias current equal to $I_C$, as a function of all relevant component values/properties.

(d)

derive an expression for the input impedance $z_{\mathit{in}}$ as seen by the signal source.

(e)

derive an expression for the voltage gain $a_v=v_{\mathit{out}}∕v_{\mathit{in}}$.

(f)

derive a small signal equivalent for the transistor in the circuit assuming a slightly different element equation than used in the previous questions: $i_C=I_{C0}\cdot e^{\frac{q\cdot v_{\mathit{BE}}}{\mathit{kT}}}\cdot (1+\lambda \cdot v_{\mathit{CE}})$. The transistor’s current gain $\mathit{\alpha fe}$ is finite and cannot be neglected. ALSO derive (not: only state) the small signal parameters as function of e.g. the bias current $I_C$ of the transistor. Physics constants are constant and the temperature T may be assumed to be constant.