Exercise 5.5 A common-base and a common emitter amplifier

The figure below shows the circuit schematic of the input stage of a low-noise dynamic microphone pre-amplifier. The voltage from the microphone is indicated by $V_{\mathit{mic}}$. In this circuit, the supply voltage $V_{\mathit{CC}}=12V$. The transistor has a very large output resistance and $\mathit{\beta fe}=200$. For the signal frequencies of interest all capacitors may be considered as low-ohmic.

a)

Derive that the voltage gain $a_v$ of this circuit is ideally given by $a_v=g_m\cdot R_C$ if there is no load connected to the output of the amplifier.

b)

In reality, the circuit will be loaded by the input impedance of the next (amplifier) stage. Draw the small signal equivalent circuit, including the input resistance $R_{\mathit{in},\mathit{NEXT}}$ of the next amplifier stage

c)

Derive an expression for the voltage gain $a_v$ of the input stage, loaded by the input resistance $R_{\mathit{IN},\mathit{NEXT}}$ of the next stage.

d)

Derive an expression for the input resistance of the pre-amplifier input stage.

e)

Calculate the required bias collector current $I_C$ for an input resistance of $250\mathrm{\Omega }$ (apparently the optimum value for the selected microphone).

f)

We assume for now that $R_{\mathit{IN},\mathit{NEXT}}$ of the next stage is $40k\mathrm{\Omega }$. Derive an equation for $R_C$ to obtain a voltage gain $a_v=80$ of the input stage.

The following figure shows the schematic of a second amplifier stage that is used to further amplify the voltage from the input stage reported above. To reduce the distortion due to the relatively large signal levels, emitter degeneration is used via resistor $R_{E1}$. Again, $V_{\mathit{CC}}=12V$, $\mathit{\beta fe}=200$, and for the signal frequencies of interest all capacitors may be considered as low-ohmic.

g)

Draw the small signal equivalent circuit for this second amplifier stage.

h)

Derive an expression for the voltage gain of this second amplifier stage.

i)

Derive an expression for the small-signal input resistance $r_{\mathit{in}}$ of the second amplifier stage.

j)

The second amplifier stage is dimensioned as follows: $R_C=3k\mathrm{\Omega }$, $R_{E1}=300\mathrm{\Omega }$, $R_{E2}=600\mathrm{\Omega }$, $R_{B1}=400k\mathrm{\Omega }$, $R_{B2}=100k\mathrm{\Omega }$. Calculate the numerical value of the input resistance of the second amplifier stage. Is it smaller or larger than the assumption of $40k\mathrm{\Omega }$? How does this affect the voltage gain of the input stage?