4 Small signal equivalent circuits

Q 4.1
(a)


An answer:

Assuming voltage-controlled voltage sources as amplifiers or voltage controlled current sources with resistor — whatever floats your goat — you get:

pict

vo1 vi = av1 rin1 rin1 + Rg = 30 6kΩ 6kΩ + 600Ω 27 vo2 vi = av2 rin2 rin2 + Rg = 60 600Ω 600Ω + 600Ω = 30

(b)


An answer:
The equivalent relevant part of the circuit for this question is given below.

pict

H() = vo vi = rin rin + Rg + 1 CC = rinCC 1 + (rin + Rg)CC = rin rin + Rg (rin + Rg)CC 1 + (rin + Rg)CC

The cut-off frequency of this first order high pass transfer function is

fc = 1 2πCC(rin+Rg)

Solving for CC gives:

CC = 6μF (ri = 600Ω) CC = 1.2μF (ri = 6kΩ)

(c)


An answer:
pict

Q 4.2
(a)

An answer:
ID1 = 1 2K (V GS V TH) 2 V GS = V G V S V G = Rg2 Rg1 + Rg2 V DD V S = 0 ID1 = 1 2K ( Rg2 Rg1 + Rg2 V DD V TH) 2

(b)


An answer:

A first step can be replacing impedances of pasives with their value at signal frequencies, and setting DC sources to zero.

pict

After which a second step can be replacing the non-linear components by their SSEC and cleaning up the schematic. This latter usually is unwinding the (virtual) ground node.

pict

(c)

An answer:
av = vout vin vout = gm vgsRd vgs = vs vs = vin av = gm vin vin Rd = gmRd

(d)

An answer:
Applying Ohm’s law to the input port and (re)using the input voltage source to drive input port: rin = vin iin iin = gm vgs vgs = vs vs = vin rin = 1 gm

(e)

An answer:
Assuming a current source driving the output port: rout = vout iout vout = (iout gm vgs) Rd vgs = 0 rout = Rd

Q 4.3

An answer:
3 cascaded stages would give (100)3 = 106 x gain. 3 parallel stages would give 100 x gain.
Q 4.4

An answer:
Both V DD and the capacitors are modelled by a short-circuit. Failing so most likely will force errors somewhere.

pict

The derivation of rin is straight forward, leading to:

Rin = R3 + R1αfe gm

Q 4.5
(a)


An answer:
Non-inverting. This can be shown in multiple ways. You could derive a proper equation for voltage gain and have a look at its sign (note that by setting reactances to shorts or opens there is no phase shift). Another way is to do an if-this-than-that analysis:

an increase in vin a decrease in vGS a decrease in iD1 a lower voltage drop across Rd an increase of vOUT

(b)

An answer:

pict

(c)

An answer:
av = vout vin vout = gmvgsRd vgs = vin av = gmRd

(d)

An answer:
rin = vin iin iin = gmvgs vgs = vin rin = vin gmvin = 1 gm

Q 4.6
(a)


An answer:

pict

(b)

An answer:
av = vout vin vout = gmvbeR2 vbe = vin ve ve = gmvbe (1 + 1 αfe ) R4 vbe = vin gmvbe (1 + 1 αfe ) R4 = vin 1 + gm (1 + 1 αfe ) R4 av = gmR2 1 + gm (1 + 1 αfe ) R4

Q 4.7
(a)


An answer:

pict

ac = vout vin vout = gmvbeR2 vbe = (αfe gm R1) vin 1 Cin + R3 + (αfe gm R1) av = gmR2 (αfe gm R1) 1 Cin + R3 + (αfe gm R1) = gmR2 (αfe gm R1) Cin 1 + (R3 + (αfe gm R1)) Cin

Where the shorthand notation for parallel impedances is used: AB is the impedance of A and B in parallel.

(b)


An answer:
The big chunk of the work was done in the previous answer. From that is can readily be derived that the transfer function is first order high-pass. The high-frequency voltage gain is:

av() = gmR2 αfe gm R1 R3 + (αfe gm R1)

The pole (and zero) is:

ω0 = 1 (R3 + (αfe gm R1)) Cin

(c)

An answer:

pict

Q 4.8
(a)

An answer:

pict

(b)

An answer:
In the derivation already included is vgs = vin. av = vout vin vout = Rd iRd = Rd (gmvin vout vin Rg ) = gmRd vin + Rd Rgvin 1 + Rd Rg av = Rd Rg gmRd 1 + Rd Rg = Rd (1 gmRg) Rg + Rd

(c)

An answer:
zout = RgRd
(d)

An answer:
zout = 1 gmRd

Q 4.9
(a)

An answer:

pict

(b)

An answer:
ID = 1 2K (V GS V T ) 2 V GS = V GG IDRS ID = 1 2K (V GG V T IDRS) 2 = 1 2K (V x IDRS) 2,with V x = V GG V T = 1 2K (V x2 2V xIDRS + ID2R S2) (solve quadratic equation) 0 = ID2 1 2KRS2 I D (1 + KV xRS) + 1 2KV x2 ID = 1 + KV xRS ± (1 + KV x RS ) 2 (KV x RS ) 2 KRS2

Of these 2 solutions, only one is valid. This valid solution corresponds to V GS > V T .

(c)


An answer:

gm = 2KID,substitute ID from (b)
(d)

An answer:
vout = gmvinRD vout vin = gmRD
(e)

An answer:
The input resistance is infinite.

Q 4.10
(a)

An answer:
av = gmRC gm = 40 IC IC = V RC RC

from which it follows that the maximum achievable (absolute) voltage gain is

|av| = 40 V RC

which is directly determined by (and limited by) the supply voltage. Note that the 40 = qkT 40 at room temperature; at low temperatures this factor is higher.

(b)

An answer:
Using the square law: av = gmRD gm = 2KID ID = V RD RD

from which it follows that the maximum achievable (absolute) voltage gain is

|av| = 2K V RD RD RD = 2KRD V RD

From which it follows that for maximum (absolute) voltage gain, the K and the RD should be as large as possible and consequently the ID should be set very low. There seems to be no limit to these which would indicate that |av| can be set arbitrarily high.

(c)

An answer:
For the MOS question, you probably used the square law. This square low is not valid for vGS V T < kTq as then a different operation region is entered: moderate inversion (MI) or even weak inversion (WI). Weak inversion is ignored in this course: there the MOS transistor is modelled as being ”off”. Moderate inversion is not dealt with in this book as it is a transition region between strong inversion (square law) and the (here neglected) weak inversion region. This simplification for the MOS element equations makes derivation (results) for which vGS V T < kTq far from realistic. Including MI and WI equations would show that MOS amplifiers end up at lower gain than for the bipolar case.

Q 4.11
(a)

An answer:
A partial answer: you should be able to map this on a corresponding SSEC. In the end, that’s what you did for an MOS transistor and/or for a BJT previously. iG vGC = 0open iG vAC = 0open iA vGC = K 3 2 (vGC + vAC μ )12voltage controlled current source  iA vAC = K 3 2μ (vGC + vAC μ )12resistor

Q 4.12
(a)

An answer:
A partial answer: you should be able to map this on a corresponding SSEC. In the end, that’s what you did for an MOS transistor and/or for a BJT and/or for the triode tube previously. iG vGC = 0open iG vAC = 0open iA vGC = K 3 2 (vGC + vAC μc + V HIGH μs ) 12voltage controlled current source  iA vAC = K 3 2μc (vGC + vAC μc + V HIGH μs ) 12resistor

Q 4.13
(a)
(b)