Exercise 4.2 An NMOS amplifier circuit

a)

An answer:
ID1 = 1 2K (V GS V TH) 2 V GS = V G V S V G = Rg2 Rg1 + Rg2 V DD V S = 0 ID1 = 1 2K ( Rg2 Rg1 + Rg2 V DD V TH) 2

b)


An answer:

A first step can be replacing impedances of pasives with their value at signal frequencies, and setting DC sources to zero.

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After which a second step can be replacing the non-linear components by their SSEC and cleaning up the schematic. This latter usually is unwinding the (virtual) ground node.

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c)

An answer:
av = vout vin vout = gm vgsRd vgs = vs vs = vin av = gm vin vin Rd = gmRd

d)

An answer:
Applying Ohm’s law to the input port and (re)using the input voltage source to drive input port: rin = vin iin iin = gm vgs vgs = vs vs = vin rin = 1 gm

e)

An answer:
Assuming a current source driving the output port: rout = vout iout vout = (iout gm vgs) Rd vgs = 0 rout = Rd