Biasing an amplifier circuit with an NMOS transistor

a)

An answer:

\begin{array}{rcl} R_{S} & = \frac{V_{S}}{I_{D}} \\ V_{S} = V_{G} - V_{GS} \\ I_{D} = I_{BIAS} \\ V_{GS} = V_{T} + \sqrt{\frac{2 I_{BIAS}}{K}} \\ V_{G} = V_{DD} \cdot \frac{R_{G 2}}{R_{G 1} + R_{G 2}} \\ R_{S} & = \frac{V_{DD} \cdot \frac{R_{G 2}}{R_{G 1} + R_{G 2}} - V_{T} - \sqrt{\frac{2 I_{BIAS}}{K}}}{I_{BIAS}} \end{array}

b)

An answer:

\begin{array}{rcl} V_{G} & = 5 V \\ V_{GS} & = 3 V \\ V_{S} & = 2 V \\ R_{S} & = \frac{2 V}{4 mA} = 500 Ω \end{array}

c)

An answer:
For saturation,

V_{DS} \geq V_{GS} - V_{T}

, and then

\begin{array}{rcl} V_{D} \geq V_{S} + V_{GS} - V_{T} \\ V_{D} = V_{DD} - I_{D} \cdot R_{D} \end{array}

From these, it follows that

\begin{array}{rcl} R_{D} < \frac{V_{DD} - V_{S} - V_{GS} + V_{T}}{I_{D}} = 1.5 k Ω \end{array}

d)

An answer:
Parallel C: no more degeneration for signals $\to$ higher gain.

Parallel L to $R_{S}$ : more degeneration for signals $\to$ lower gain.

Parallel L to $R_{D}$ : higher impedance for the conversion of signal current (variation in the current) to output voltage change $\to$ higher gain.