Exercise 8.7 A MOS output stage

a)

An answer:
The gate current of an MOS transistor is zero, and $v_{R1}=V_T$. Hence:

$$\begin{array}{rcll}& R_1& =\frac{V_T}{i_{R1}}& \\ & & i_{R1}=\frac{V_{\mathit{DD}}-V_T}{R_2}& \\ & R_1& =\frac{R_2}{\frac{V_{\mathit{DD}}}{V_T}-1}& \\ & & =1.125k\mathrm{\Omega }& \end{array}$$

b)

An answer:

$$\begin{array}{rcll}& v_X& =V_{\mathit{DD}}\cdot \frac{R_2}{R_1+R_2}+v_G\cdot \frac{R_1}{R_1+R_2}& \\ & & =12V+v_G∕5& \end{array}$$

For $v_X=10V$ this requires $v_G=-10V$

c)

d)

An answer:
$|I_{D,M_1}|=2A$ and $v_{\mathit{OUT}}=10V$

e)

An answer:
$v_{\mathit{OUT}}=-10V$

f)

An answer:
$v_{\mathit{OUT}}\approx -15V$ assuming the square law relation. Note that this assumption is violated: $v_{\mathit{OUT}}$ cannot fully reach $-15V$ since $M_2$ will enter the linear region for $v_{\mathit{DS}}<v_{\mathit{GS}}-V_T$.